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LTC1685 52Mbps, Precision Delay, RS485 Fail-Safe Transceiver
FEATURES
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DESCRIPTION
The LTC(R)1685 is a high speed, precision delay RS485 transceiver that can operate at data rates as high as 52Mbps. The device also meets the requirements of RS422. A unique architecture provides very stable propagation delays and low skew over a wide common mode and ambient temperature range. The driver and receiver feature three-state outputs, with disabled driver outputs maintaining high impedance over the entire common mode range. A short circuit feature detects shorted outputs and substantially reduces driver output current. A similar feature also protects the receiver output from short circuits. Thermal shutdown circuitry protects from excessive power dissipation. The receiver has a fail-safe feature that guarantees a high output state when the inputs are shorted or are left floating. The LTC1685 RS485 transceiver guarantees receiver failsafe operation over the entire common mode range (- 7V to 12V). Input resistance will remain 22k when the device is unpowered or disabled. The LTC1685 operates from a single 5V supply and draws only 7mA of supply current.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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Precision Propagation Delay Over Temperature: Receiver/Driver: 18.5ns 3.5ns High Data Rate: 52Mbps Low tPLH/tPHL Skew: Receiver/Driver: 500ps Typ -7V to 12V RS485 Input Common Mode Range Guaranteed Fail-Safe Receiver Operation Over the Entire Common Mode Range High Receiver Input Resistance: 22k, Even When Unpowered Short-Circuit Protected Thermal Shutdown Protected Driver Maintains High Impedance in Three-State or with Power Off Single 5V Supply Pin Compatible with LTC485 45dB CMRR at 26MHz
APPLICATIONS
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High Speed RS485/RS422 Transceivers Level Translator Backplane Transceiver STS-1/OC-1 Data Transceiver Fast-20, Fast-40 SCSI Transceivers
TYPICAL APPLICATION
RO1 R RE1 DE1 DI1 D GND1
1V/DIV
10Mbps Data Pulse 400ft Category 5 UTP
VCC1 Rt
2V/DIV DRIVER INPUT CABLE DELAY
RO2 R RE2 DE2 DI2 D
Rt VCC2
5V/DIV RECEIVER OUTPUT
GND2
1685 TA01
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RECEIVER INPUT
100ns/DIV
1685 TA02
1
LTC1685 ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW RO 1 R RE 2 DE 3 DI 4 D 7 6 5 8 VDD B A GND
Supply Voltage (VDD) .............................................. 10V Control Input Currents .................... - 100mA to 100mA Control Input Voltages .................. - 0.5V to VDD + 0.5V Driver Input Voltages .................... - 0.5V to VDD + 0.5V Driver Output Voltages .................................. +12V/- 7V Receiver Input Voltages ................................. +12V/- 7V Receiver Output Voltages ............. - 0.5V to VDD + 0.5V Receiver Input Differential ...................................... 10V Short-Circuit Duration (Driver VOUT: - 7V to 10V, Receiver VOUT: 0V to VDD) ............................... Indefinite Operating Temperature Range .................... 0C to 70C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC1685CS8 S8 PART MARKING 1685
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 125C, JA = 150C/ W
Consult factory for Industrial and Military grade parts.
DC ELECTRICAL CHARACTERISTICS
VDD = 5V 5%, unless otherwise noted. (Notes 2, 3)
SYMBOL VOD1 VOD2 VOD PARAMETER Differential Driver Output (Unloaded) Differential Driver Output (With Load) Change in Magnitude of Driver Differential Output Voltage for Complementary Output States Driver Common Mode Output Voltage Change in Magnitude of Driver Common Mode Output Voltage for Complementary Output States Input High Voltage Input Low Voltage Input Current Input Current (A, B) Differential Input Threshold Voltage for Receiver Receiver Input Hysteresis Receiver Output High Voltage Receiver Output Low Voltage Three-State (High Impedance) Output Current at Receiver Supply Current Driver Short-Circuit Current, VOUT = HIGH Driver Short-Circuit Current, VOUT = LOW Receiver Short-Circuit Current CONDITIONS IOUT = 0 R = 50 (RS422) R = 27 (RS485), Figure 1 R = 27 or 50, Figure 1
q q q
MIN 2 1.5
TYP
MAX VDD VDD 0.2
UNITS V V V V
VOC VOC
R = 27 or 50, VDD = 5V, Figure 1 R = 27 or 50, Figure 1
q q
2
3 0.2
VIH VIL IIN1 IIN2 VTH VTH VOH VOL IOZR IDD IOSD1 IOSD2 IOSR
DE, DI, RE DE, DI, RE DE, DI, RE VA, VB = 12V, DE = 0, VDD = 0V or 5.25V VA, VB = - 7V, DE = 0, VDD = 0V or 5.25V - 7V VCM 12V VCM = 0V IOUT = - 4mA, VID = 300mV IOUT = 4mA, VID = - 300mV 0.4V VOUT 2.4V No Load, Pins 2, 3, 4 = 0V or VDD VOUT = - 7V or 10V (Note 5) VOUT = - 7V or 10V (Note 5) VOUT = 0V or VDD (Note 5)
q q q q q q
2 0.8 -1 - 500 - 0.3 25 0.3 1 500
q q q q q q q
3.5 -1
4.8 0.4 1 7 12 20 20 20
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V V V V A A A V mV V V A mA mA mA mA
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LTC1685
DC ELECTRICAL CHARACTERISTICS
VDD = 5V 5%, unless otherwise noted. (Notes 2, 3)
SYMBOL RIN CIN Fail-Safe Time CMRR CLOAD PARAMETER Input Resistance Input Capacitance Open-Circuit Input Voltage, Figure 5 Time to Detect Fail-Safe Condition Receiver Input Common Mode Rejection Ratio Receiver and Driver Output Load Capacitance VCM = 2.6V, f = 26MHz (Note 4)
q
CONDITIONS - 7V VCM 12V A, B Inputs, D, DE, RE VDD = 5V (Note 4)
q q
MIN 22
TYP 3
MAX
UNITS k pF
3.2
3.3 2 45
3.4
V s dB
500
pF
SWITCHING CHARACTERISTICS
VDD = 5V, unless otherwise noted. (Notes 2, 3)
SYMBOL tPLH, tPHL tSKEW t r , tf tZH tZL tLZ t HZ tPLH, tPHL tSQD tZL tZH tLZ t HZ PARAMETER Driver Input-to-Output Propagation Delay Driver Output A-to-Output B Skew Driver Rise/Fall Time Driver Enable to Output High Driver Enable to Output Low Driver Disable from Low Driver Disable from High CONDITIONS RDIFF = 54, CL1 = CL2 = 100pF, Figures 3, 5 RDIFF = 54, CL1 = CL2 = 100pF, Figures 3, 5 RDIFF = 54, CL1 = CL2 = 100pF, Figures 3, 5 CL = 100pF, S2 Closed, Figures 4, 6 CL = 100pF, S1 Closed, Figures 4, 6 CL = 15pF, S1 Closed, Figures 4, 6 CL = 15pF, S2 Closed, Figures 4, 6
q q q q q q
Receiver Input-to-Output Propagation Delay CL = 15pF, Figures 3, 7 Receiver Skew tPLH - tPHL CL = 15pF, Figures 3, 7 Receiver Enable to Output Low Receiver Enable to Output High Receiver Disable from Low Receiver Disable from High Maximum Receiver Input Rise/Fall Times CL = 15pF, S1 Closed, Figures 2, 8 CL = 15pF, S2 Closed, Figures 2, 8 CL = 15pF, S1 Closed, Figures 2, 8 CL = 15pF, S2 Closed, Figures 2, 8 (Note 4) Same Temperature (Note 4) VDD = 5V 5% (Note 4) VDD = 5V 5% (Note 4) VDD = 5V 5% (Note 4)
tPKG-PKG
Package-to-Package Skew Minimum Input Pulse Width Maximum Data Rate Maximum Input Frequency
The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All currents into the device pins are positive; all currents out of the device pins are negative.
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MIN 15
TYP 18.5 500 3.5 25 25 25 25
MAX 22
UNITS ns ps ns
50 50 50 50 22 50 50 50 50 2000
ns ns ns ns ns ps ns ns ns ns ns ns
15
18.5 500 25 25 25 25
q q q q q
1.5
q q q
17 52 26 60 30
19.2
ns Mbps MHz
Note 3: All typicals are given for VDD = 5V, TA = 25C. Note 4: Guaranteed by design, but not tested. Note 5: Short-circuit current does not represent output drive capability. When the output detects a short-circuit condition, output drive current is significantly reduced (from hundreds of mA to 20mA max) until the short is removed.
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LTC1685 TYPICAL PERFORMANCE CHARACTERISTICS
Receiver Input CMRR
46.5
COMMON MODE REJECTION RATIO (dB)
46.0
SUPPLY CURRENT (mA)
45.0 44.5 44.0 43.5 43.0 42.5 TA = 25C 42.0 10 1k 100k FREQUENCY (Hz) 1M
1685 G01
50 40 30 20 10 0 1 10 30 DATA RATE (Mbps) 20 40 50
1685 G02
SUPPLY CURRENT (mA)
45.5
Receiver Propagation Delay vs Load Capacitance
30 TA = 25C 25 25
RECEIVER PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
20 15 10 5 0
PROPAGATION DELAY (ns)
5
15
25 35 55 105 LOAD CAPACITANCE (pF)
Receiver Propagation Delay vs Temperature
25
70 60
PROPAGATION DELAY (ns)
20
DATA RATE (Mbps)
15
10
5
10
0 -50 -25
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UW
1685 G04
Supply Current vs Data Rate
70 BOTH DRIVER AND RECEIVER ENABLED AND LOADED 60 T = 25C A
Supply Current vs Temperature
58 57 56 55 54 53 52 51 BOTH DRIVER AND RECEIVER ENABLED AND LOADED 25Mbps DATA RATE 0 25 50 TEMPERATURE (C) 75 100
1685 G03
50 - 25
Receiver Propagation Delay vs Common Mode
25
Receiver Propagation Delay vs Input Overdrive
TA = 25C 20
TA = 25C
20
15
15
10
10
5
5
205
0 8 10 4 -7 -4 -2 0 6 2 RECEIVER COMMON MODE (V) 12
0 0.3 0.5 0.7 1.0 1.25 1.5 2.0 RECEIVER INPUT OVERDRIVE (V) 2.5
1685 G05
1685 G06
Receiver Maximum Data Rate vs Input Overdrive
TA = 25C
50 40 30 20
50 0 75 25 TEMPERATURE (C)
100
125
0 0.3
1.5 0.4 0.5 0.6 0.7 1.0 RECEIVER INPUT DIFFERENTIAL (V)
2.5
1680 G09
1685 G10
LTC1685 TYPICAL PERFORMANCE CHARACTERISTICS
Driver Propagation Delay vs Temperature
25
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
tLH 15
PROPAGATION DELAY (ns)
20
15
10
5
0 - 20
0
20 40 60 TEMPERATURE (C)
PIN FUNCTIONS
RO (Pin 1): Receiver Output. If A B by 300mV, then RO will be high. If A B by 300mV, then RO will be low. RE (Pin 2): Receiver Enable. RE = Low enables the receiver. RE = High forces receiver output into high impedance state. Do not float. DE (Pin 3): Driver Enable. DE = High enables the driver. DE = Low will force the driver output into a high impedance state and the device will function as a line receiver if RE is also low. Do not float. DI (Pin 4): Driver Input. Controls the states of the A and B outputs only if DE = High. If DE = Low, DI will have no effect on A and B pins. Do not float. GND (Pin 5): Ground. A (Pin 6): Noninverting Receiver Input/Driver Output. B (Pin 7): Inverting Receiver Input/Driver Output. VDD (Pin 8): Positive Supply, 5V to 5%. Bypass with 0.1F ceramic capacitor.
UW
80
1685 G07
Driver Propagation Delay vs Driver Input Voltage
25 VDD = 5V INPUT THRESHOLD = 1.5V TA = 25C tHL
19.0
Driver Propagation Delay vs Capacitive Load
TA = 25C 18.5 18.0 17.5 17.0 16.5 16.0
20
10
5
100
0 2.5
3.0 4.0 4.5 3.5 DRIVER INPUT VOLTAGE (V)
5.0
1685 G08
5
15
25 50 75 100 LOAD CAPACITANCE (pF)
150
1685 G11
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LTC1685
FU CTIO TABLES
Transmitting
RE X X X X INPUTS DE 1 1 0 1 DI 1 0 X X LINE CONDITION No Fault No Fault X Fault OUTPUTS B 0 1 Hi-Z A 1 0 Hi-Z RE 0 0 0 0 1
TEST CIRCUITS
A R VOD R B
1685 F01
3V DE A DI B RDIFF CL2 CL1 A RO B RE 15pF
Figure 3. Driver/Receiver Timing Test Circuit
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Receiving
INPUTS DE 0 0 0 0 X A-B 300mV - 300mV Inputs Open Inputs Shorted Together A = B = - 7V to 12V X OUTPUT RO 1 0 1 1 Hi-Z
10mA Current Source
TEST POINT RECEIVER OUTPUT
VOC
S1
1k VDD
CL 15pF
1k
S2
1685 F02
Figure 1. Driver DC Test Load
Figure 2. Driver DC Test Load
S1 OUTPUT UNDER TEST 500 S2 CL
1685 F04
1685 F03
VDD
Figure 4. Driver Timing Test Load #2
LTC1685
SWITCHI G TI E WAVEFOR S
3V DI 0V t PLH B VO A 1/2 VO VO 0V -VO 10% tr tSKEW 90% VDIFF = V(A) - V(B) tf 90% 10%
1586 F05
1.5V
Figure 5. Driver Propagation Delays
3V DE 0V 5V A, B VOL VOH A, B 0V t ZH 2.5V t ZL 2.5V 1.5V
Figure 6. Driver Enable and Disable Times
VOH RO VOL t PHL VOD2 A-B -VOD2 0V 2.5V OUTPUT f = 1MHz, t r 3ns, t f 3ns INPUT t PLH 2.5V
Figure 7. Receiver Propagation Delays
3V RE 0V 5V RO t ZL 2.5V OUTPUT NORMALLY LOW t LZ 0.5V 1.5V f = 1MHz, t r 3ns, t f 3ns 1.5V
RO 0V t ZH
Figure 8. Receiver Enable and Disable Times
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f = 1MHz, t r 3ns, t f 3ns t PHL
1.5V 1/2 VO
t SKEW
f = 1MHz, t r 3ns, t f 3ns t LZ OUTPUT NORMALLY LOW
1.5V
0.5V
OUTPUT NORMALLY HIGH t HZ
0.5V
1686 F06
1686 F07
2.5V
OUTPUT NORMALLY HIGH t HZ
0.5V
1685 F08
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LTC1685
EQUIVALENT INPUT NETWORKS
APPLICATIONS INFORMATION
Theory of Operation Unlike typical CMOS transceivers whose propagation delay can vary by as much as 500% from package to package and show significant temperature drift, the LTC1685 employs a novel architecture that produces a tightly controlled and temperature compensated propagation delay. The differential timing skew is also minimized between rising and falling output edges of the receiver output and the complementary driver outputs. The precision timing features of the LTC1685 reduce overall system timing constraints by providing a narrow 3.5ns window during which valid data appears at the receiver/driver output. The driver and receiver pair will have propagation delays that typically match to within 1ns. In clocked data systems, the low skew minimizes duty cycle distortion of the clock signal. The LTC1685 can be used at data rates of 52Mbps with less than 5% duty cycle distortion (depending on cable length). When a clock signal is used to retime parallel data, the maximum recommended data transmission rate is 26Mbps to avoid timing errors due to clock distortion. Fail-Safe Features The LTC1685 has a fail-safe feature that guarantees the receiver output to be in a logic HIGH state when the inputs are either shorted or left open (note that when inputs are left open, large external leakage currents might override the fail-safe circuitry). In order to maintain good high frequency performance, it was necessary to slow down the transient response of the fail-safe feature. When a line fault is detected, the output will go HIGH typically in 2s. Note that the LTC1685 guarantees fail-safe performance over the entire (- 7V to 12V) common mode range! When the inputs are accidentally shorted (by cutting through a cable, for example), the short circuit fail-safe feature will guarantee a high output logic level. Note also that if the line driver is removed and the termination resistors are left in place, the receiver will see this as a "short" and output a logic HIGH. Both of these fail-safe features will keep the receiver from outputting false data pulses under line fault conditions. Thermal shutdown and short-circuit protection prevent latchup damage to the LTC1685 during fault conditions.
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22k A 22k B 3.3V B 3.3V A
22k 22k
DE = 0, RE = 0 OR 1 VDD = 5V
VDD = 0V
1685 F09
Figure 9. Input Thevenin Equivalent
LTC1685
APPLICATIONS INFORMATION
Output Short-Circuit Protection The LTC1685 employs voltage sensing short-circuit protection at the output terminals of both the driver and receiver. For a given input polarity, this circuitry determines what the correct output level should be. If the output level is different from the expected, it shuts off the big output devices. For example, if the driver input is >2V, it expects the "A" output to be >3.25V and the "B" output to be <1.75V. If the "A" output is subsequently shorted to a voltage below VDD/2, this circuitry shuts off the big output devices and turns on a smaller device in its place (the converse applies for the "B" output). The outputs then appear as 10mA current sources. Note that under normal operation, the output drivers can sink/source >50mA. A time-out period of about 50ns is used in order to maintain normal high frequency operation, even under heavy capacitive loads. If the cable is shorted at a large distance from the device outputs, it is possible for the short to go unnoticed at the driver outputs due to parasitic cable resistance. Additionally, when the cable is shorted, it no longer appears as an ideal transmission line, and the parasitic L's and C's might give rise to ringing and even oscillation. All these conditions disappear once the device comes out of short-circuit mode. For cables with the typical RS485 termination (no DC bias on the cable, such as Figure 10), the LTC1685 will automatically come out of short-circuit mode once the physical short has been removed. With cable terminations with a DC bias (such as Fast-20 and Fast-40 differential SCSI
RE 2 RO 1 7 DI 4 3 DE LTC1685 6 100 A1 3 RO
1685 F10b
100 2B 1/4 LTC1518 12
6
EN EN
4
Figure 10
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terminators, see Figure 15), the LTC1685 will not come out of short-circuit mode automatically upon release of the physical short. In order to resume normal operation, the DE pin has to be pulsed low for at least 200ns. High Speed Twisted Pair Transmission Data rates up to 52Mbps can be transmitted over 100ft of category 5 twisted pair. Figure 10 shows the LTC1685 receiving differential data from another LTC1685 transceiver. Figure 11a shows a 26MHz (52Mbps) square wave propagated over 100ft of category 5 UTP. Figure 11b shows a more stringent case of propagating a single 20ns pulse over 100ft of category 5 UTP. Figure 12 shows a 4Mbps square wave over 1000ft of category 5 unshielded twisted pair.
2V/DIV
DRIVER INPUT
2V/DIV
RECEIVER OUTPUT 10ns/DIV
1685 F11
Figure 11a. 100ft of Category 5 UTP: 50Mbps
2V/DIV
RE 2 1 RO
CABLE DELAY
DRIVER INPUT
2V/DIV
4 3 DE DI
RECEIVER INPUT
5V/DIV
LTC1685
RECEIVER OUTPUT
20ns/DIV
1685 F11b
Figure 11b. 100ft of Category 5 UTP: 20ns Pulse
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LTC1685
APPLICATIONS INFORMATION
2V/DIV CABLE DELAY DRIVER INPUT
2V/DIV
DRIVER INPUT
RECEIVER INPUT
2V/DIV
RECEIVER OUTPUT
200ns/DIV
1685 F12
Figure 12. 1000ft of Category 5 UTP: 4Mbps
2V/DIV
DRIVER INPUT
2V/DIV DRIVER INPUT
2V/DIV
DIFFERENTIAL RECEIVER INPUT
2V/DIV
RECEIVER OUTPUT
20ns/DIV
1685 F13
Figure 13. 100ft of Telephone Grade UTP: 30Mbps
Very inexpensive unshielded telephone grade twisted pair is shown in Figure 13. In spite of the noticeable loss at the receiver input, the LTC1685 can still transfer 30Mbps at 100ft of telephone grade UTP. Note that under all these conditions, the LTC1685 can pass through a single data pulse equal to the inverse of the data rate (e.g., 20ns for 50Mbps data rate). Even at distances of 4000ft, 1Mbps data rates are possible using the LTC1685 and category 5 UTP. Figure 14a shows a 1s pulse propagated down 4000ft of category 5 UTP. Notice both the DC and the AC losses at the receiver input. The DC attenuation is due to the parasitic resistance of the cable. Figure 14b shows a 1Mbps square wave over 4000ft. To transmit at this speed but using longer cable lengths, see the LTC1686/LTC1687 high speed RS485 full-duplex transceivers.
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1V/DIV
5V/DIV
RECEIVER OUTPUT
1s/DIV
1685 F14a
Figure 14a. 4000ft of Category 5 UTP: 1s Pulse
5V/DIV
RECEIVER OUTPUT
1s/DIV
1685 F14b
Figure 14b. 4000ft of Category 5 UTP: 1Mbps Square Wave
High Speed Backplane Transmission The LTC1685 can also be used in backplane point-to-point transceiver applications, where the user wants to assure operation even when the common mode goes above or below the rails. It is advisable to terminate the PC traces when approaching maximum speeds. Since the LTC1685 is not intended to drive parallel terminated cables with characteristic impedances much less than that of twisted pair, both ends of the PC trace must be series terminated with the characteristic impedance of the trace. For best results, the signal should be routed differentially. The true and complement outputs of the LTC1685 should be routed on adjacent layers of the PC board. The two traces should be routed very symmetrically, minimizing and equalizing parasitics to nearby signal and power/ground layers. For single-ended transmission, route the series terminated
LTC1685
APPLICATIONS INFORMATION
single-ended trace over an adjacent ground plane. Then set the (bypassed) negative input of the receiver to roughly 2.5V. Note that single-ended operation might not reach maximum speeds. High Speed Differential SCSI (Fast-20, Fast-40 HVD) The LTC1685's high speed, tight propagation delay window and matched driver/receiver propagation delays make it a natural choice as the external transceiver in high speed differential SCSI applications. Note that the 3.5ns propagation delay window covers the entire commercial temperature range. If, for example, a group of 16 transceivers is placed on the same board, their temperature difference will be much smaller. Hence, the difference in their propagation delays should be even better than the 3.5ns specification (typically better than 2ns). The LTC1685 is the most efficient and reliable implementation that meets the Fast-20 and Fast-40 HVD driver and receiver skew specifications. Power-Up Requirements The LTC1685 has unique short-circuit protection that shuts off the big output devices (and keeps them off) when a short is detected. When the LTC1685 is powered up with the driver outputs enabled (Figure 15 shows a typical connection), the part will power up in short-circuit mode. After power-up, the user must hold the DE pin of the LTC1685 low for at least 200ns in order to start normal operation. Note also that turning the termination power on/off might induce the LTC1685 to see a "short." Consequently, the DE pin should be held low for 200ns after cable termination power is turned on. This requirement is solely due to the cable termination (the 165 parallel resistance to both power and ground). For applications whose connections to the cable are made exclusively with RS485 devices, the cable can be terminated only across the two signal wires (as in Figure 10). With cable distances covering under 25 meters, the common mode range of the LTC1685 should be more than sufficient to account for any ground differences between any two communicating devices. The fact that transmission is differential should greatly improve noise
RE TERM POWER 2 RO 1 330 7 DI 4 3 DE LTC1685 6 150 330 EN EN A1 3 RO
1685 F15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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TERM POWER
RE 2 1 RO
122 CABLE
330 7 150 4 6 3 DE DI
4 12
2B
330
1/4 LTC1518
LTC1685
Figure 15. Fast-20, Fast-40 Differential SCSI Application
margin. Furthermore, the good high frequency CMRR of the receiver will serve to reject any common mode interference. DE, DI Inputs It is not necessary that the driver input (DI) have 0V to 3V signal levels. The DI input can be driven by CMOS levels (0V to 5V) and still achieve 40Mbps operation. However, duty cycle will be slightly compromised when driven by a CMOS device. Care should be taken to minimize the ringing on the DI input in order to achieve a driver propagation delay within the 3.5ns window. This also improves the package-to-package matching of propagation delays. The DE pin should be held low for 200ns after the powerup sequence has been completed. After fault conditions such as an output short or thermal shutdown, the DE pin should be held low for at least 200ns after the fault has been removed. This is usually necessary only if the driver outputs are connected to DC-biased cable terminations (as in Figure 15). Layout Considerations A ground plane is recommended when using a high frequency device like the LTC1685. A 0.1F ceramic bypass capacitor less than 1/4 inch away from the VDD pin is recommended. Good bypassing is especially needed when operating at maximum frequency or when package-topackage matching is very important. The PC board traces connected to the "A" and "B" outputs must be kept as symmetrical and short as possible to obtain the same
11
LTC1685
APPLICATIONS INFORMATION
parasitic board capacitance. This maintains the good matching characteristics of the low-to-high and high-tolow transitions of the LTC1685. Note that output "A" to output "B" capacitance should also be minimized. If routed adjacent to each other on the same layer, they should be separated by an amount at least as wide as the trace widths. If output "A" and output "B" are routed on different signal planes, they should not be routed directly on top of each other. A trace width's lateral separation is also recommended. As mentioned before, care should also be taken when routing the "DI" input. To achieve consistent board-toboard propagation delay, the ringing on this signal should be kept below a few hundred millivolts.
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 7 6 5
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.016 - 0.050 0.406 - 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER LTC1485 LTC1518 LTC1519 LTC1520 LTC1686/LTC1687 DESCRIPTION High Speed RS485 Transceiver High Speed Quad RS485 Receiver High Speed Quad RS485 Receiver High Speed Quad Differential Receiver High Speed RS485 Driver/Receiver COMMENTS 10Mbps, Pin Compatible with LTC485 52Mbps, Pin Compatible with LTC488 52Mbps, Pin Compatible with LTC489 52Mbps, 100mV Threshold, Rail-to-Rail Common Mode 52Mbps, Pin Compatible with LTC490/LTC491
1685f LT/TP 0897 4K * PRINTED IN THE USA
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417 q (408) 432-1900 FAX: (408) 434-0507q TELEX: 499-3977 q www.linear-tech.com
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0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1
2
3
4
0.053 - 0.069 (1.346 - 1.752)
0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) BSC
SO8 0695
(c) LINEAR TECHNOLOGY CORPORATION 1997

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